RISC-V Processor Simulator Developer

hace 2 semanas


Buenos Aires, Buenos Aires C.F., Argentina Cadence Design Systems, Inc. A tiempo completo

Job Summary:

Cadence Design Systems, Inc. seeks a talented Simulation Software Engineer to develop and implement software models for RISC-V processor features in a hardware-software co-simulation environment. The ideal candidate will have a strong background in C/C++ development, knowledge of ISA, CPU microarchitecture, and assembly, as well as experience with SystemC and TLM methodologies.

Key Responsibilities:

  • Design and implementation of Tensilica software tool chain, particularly the instruction set simulator (ISS) for RISC-V processors
  • Development of software models for RISC-V processor features for functional, cycle-accurate, and HW/SW simulation
  • Enhancements and maintenance of the existing RISC-V simulator
  • Verification of software models in hardware-software co-simulation environment
  • Integration of the RISC-V instruction set simulator with 3rd party system modeling environments

Requirements:

  • MS or PhD in Computer Science or Electrical/Computer Engineering
  • Bachelors in computer science or electrical engineering + 7 years of related experience, or Masters + 5 years of related experience
  • Strong C/C++ development skills
  • Knowledge of ISA, CPU microarchitecture, and assembly
  • Knowledge of SystemC and TLM methodologies
  • Experience with GNU development tools and/or Microsoft Visual Studio environment
  • Experience with modeling tools for performance analysis or Hardware/Software Co-simulation
  • Experience in Electronic design automation (EDA) flow
  • Experience developing software on Linux environment
  • Ability of reading specification and standard documents, and retrieving needed knowledge from various resources


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